I work on converging the digital ASIC design with respect to area, power and timing. I can help you guide in the domains of verilog, floorplan and other design aspects related to digital design.
Digital Design Engineer, Intel Corporation
Jul 2014 to Present
Intern, Intel Corporation
Jun 2013 to Jun 2014
M.Sc. Physics + B.E. Electrical and Electronics, BITS-Pilani Goa Campus
Jul 2009 to Jun 2014