Naman Maheshwari

Graduate Student at UT Austin / Former ASIC Designer at Texas Instruments

Austin, Texas, USA

Summary
NCSim Synopsys tools Cadence Encounter Proteus C++ Language Verilog HDL Cadence Virtuoso Xilinx ISE Perl Automation Simulink Assembly Language VHDL MATLAB

I'm currently a graduate student in Electrical and Computer Engineering (Integrated Circuits & Systems track) at The University of Texas at Austin. Previously, I've worked as an ASIC Design Engineer in Design-for-Testability (DFT) domain as part of the Automotive Radar team at Texas Instruments, Bangalore, India. My work mainly focused on Built-In Self-Test (BIST) for memories in the memory-intensive Automotive Radar chip, improving the diagnostics in Multiple Input Signature Register (MISR) based scan compression architecture and Automatic Test Pattern Generation (ATPG) for advanced fault models like Small Delay Defect (SDD) and Path Delay.

I completed my bachelor’s degree in Electrical and Electronics from BITS-Pilani, Pilani Campus, India in 2015 and had the opportunity to work on Approximate Multiplier Circuits during my internship at the University of Alberta, Edmonton, Canada.

Experience

Design Engineer at Texas Instruments

Jul 2015 - Jul 2017

Digital Design Intern at Texas Insruments

Jan 2015 - Jun 2015

Visiting Research Scholar at University of Alberta

May 2014 - Aug 2014

Summer Intern at Moser Baer India Limited

May 2013 - Jul 2013

Education

Electrical and Computer Engineering (Integrated Circuits and Systems) at The University of Texas at Austin

Aug 2017 - Present

B.E.(Hons.) Electrical & Electronics Engineering at Birla Institute of Technology and Science Pilani Campus, Pilani, India

Jul 2011 - Aug 2015

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