Lavish Bhutani

Member of Technical Staff, Mentor Graphics

New Delhi Area, India

Summary
Digital hardware design PCB Design Verification Engineer Verilog HDL Hardware Description Language UVM System Verilog Analog Circuit Design Arduino

I graduated from Birla Institute of Technology and Science, Pilani in 2016 with Electrical and Electronics as my major. Currently, I am working at Mentor Graphics with the Verification IP Team

Experience

Member of Technical Staff at Mentor Graphics

Feb 2017 - Present

Member of the Design Verification Team of the VIP Group of Mentor Graphics.

Hardware R&D Engineer at GreyOrange Pte Ltd

Jun 2016 - Jan 2017

Worked with BUTLER Electronics team. Worked on PoE-PD modules and XBee. Had hands-on-experience in PCB Design and System Validation

Design Engineering Intern at Cadence Design Systems

Jul 2015 - Dec 2015

Worked with the PCIe Verification Team of the Design IP Group. Learned various digital architectural protocols such as PCIe, AXI4, APB, etc. and had hands-on-experience on verification methodologies

Education

B. E. (Hons.) Electical and Electronics Engineering at Birla Institute of Technology and Science

Jul 2012 - May 2016

image/svg+xml
Push pixels...
Shovel coal into server...
Create mockups...
Defend the wall...
Draft storyboard...
Disrupt an industry...
Achieve profitability...
Become a unicorn...
Become Batman...