Vishal Tiwari

R&D Engineer at IMEC in Leuven, Belgium

Leuven, Belgium


625 /30mins

Short Biography

Vishal Tiwari is currently working as a R&D Engineer at IMEC in Leuven, Belgium. He received his M.S (by Research) and Ph.D degrees from Department of Electrical Engineering, Indian Institute of Technology (IIT) Madras, Chennai, India and B.Tech degree in Electronics and Telecommunication with highest academic record from SGGSIE&T, Nanded, India. His research interests include the study of advanced CMOS devices from the perspective of physics, technology, experimental characterization, TCAD simulation and computational modeling for low power applications. He has worked on the analysis and modeling of gate induced drain leakage current in CMOS transistors and device/process recommendations to reduce it without affecting performance. Skills: - Extensive 5 years of research experience in Semiconductor device physics, Design of experiments, Characterization and Process/Device/Circuit simulation and Device Modeling for low power and IoT applications. - Knowledge of high mobility channel materials (SiGe, Ge, III-V) and novel CMOS device architectures - FinFET, Nanowires, Tunnel FET, 2D materials, etc. - Wafer Characterization and electrical data analysis. - TCAD process, device, circuit simulation of nanoscale devices using Sentaurus. - Numerical, Analytical and Computational nanoscale device modeling of leakage mechanisms. - Statistical data analysis, Variability, Bandstructure calculations, Quantum transport, Atomistic simulation.


R&D Engineer, imec

May 2017 to Present

GPU Software Engineer, Nvidia Corporation

Jun 2011 to Nov 2011


Ph.D Electrical Engineering, IIT Madras

Jun 2014 to Apr 2017

Microelectronics and VLSI

M.S (by Research) in Electrical Engineering, IIT Madras

Dec 2011 to May 2014

Microelectronics and VLSI

B.Tech in Electronics and Telecommunication, SGGSIE&T Nanded

Jun 2007 to Jun 2011

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